Technology users rarely ask how a chip is made. They care about the experience, how fast a phone responds, how real a video game feels, and how long a device lasts between charges. While billions of transistors and layers of manufacturing make that experience possible, most of it remains invisible to the user. Erik Hosler, a semiconductor industry expert specializing in lithography and process control technologies, highlights that keeping up with these expectations now depends on more than just transistor scaling.
Moore’s Law once provided a reliable path to performance gains through steady advances in transistor density. That path is no longer guaranteed. Consumers still expect meaningful improvements with each new device, but meeting those expectations now depends on different strategies. In the post-Moore era, progress comes from rethinking how systems are built, what technologies are combined, and how each layer contributes to the overall experience.
From Performance Metrics to User Expectations
In the past, chip designers could focus on speed, density, and power efficiency. Improving those metrics usually translates directly into a better user experience. Today, those gains are harder to come by, and they no longer align perfectly with users’ needs.
Modern consumers value responsiveness, security, longevity, and seamless connectivity. These are not solved by shrinking nodes alone. Instead, they rely on system-level integration, intelligent design, and the inclusion of new capabilities within the chip environment. The challenge for engineers is no longer only technical; it is experiential.
Shrinking Is Slowing
Transistor scaling has not stopped, but it has slowed dramatically. Each step toward a smaller node introduces more cost and complexity, with smaller and sometimes unpredictable returns. It means that many companies are choosing not to follow the leading edge and instead focus on optimization.
Smartphones, tablets, smart home devices, and wearables do not always need the smallest node. They need efficiency, security, and reliability. These requirements are pushing innovation toward areas like software integration, packaging, and intelligent resource management. Size still matters, but it is no longer the only measure of success.
The Real Role of Photonics and MEMS
Photonics and microelectromechanical systems are no longer exotic technologies. They are becoming central to the consumer electronics roadmap. Photonics offers faster communication with less heat generation, which is particularly important for high-speed interfaces, data transfer, and signal routing in AI workloads.
MEMS provides sensing, control, and environmental interaction, making devices more responsive to the real world. In smartphones, MEMS components already have power functions like haptic feedback, motion sensing, and ambient light adjustment. Their inclusion adds value that cannot be achieved by transistor scaling alone.
A Toolset for Experience Design
As engineering teams reconsider their priorities, the idea of a technology “toolkit” becomes more relevant. Rather than perfecting a single process, the industry is combining multiple domains to solve user-facing problems.
It includes the use of chiplets, low-power cores, hardware accelerators for specific tasks, integrated sensors, and localized AI processing. Together, these allow a device to respond quickly, operate efficiently, and deliver a consistent experience regardless of the processing power used. In this sense, chip design becomes an exercise in experience design.
Addressing Power and Battery Expectations
One of the clearest examples of this shift is power management. Consumers expect devices to run longer while doing more. Lowering voltage and current leakage has helped transistors shrink, but now, new strategies are needed.
Dynamic voltage scaling, core parking, localized processing, and efficient memory hierarchies all help conserve power. MEMS sensors allow chips to detect when a user is inactive or when a device can downscale its operation. Photonics reduces power loss in data transmission, which is increasingly important as devices communicate more with the cloud and other systems.
Connectivity Without Compromise
Fast, reliable connectivity is a non-negotiable feature for modern consumers. Whether using Wi-Fi, Bluetooth, or cellular signals, devices must remain in constant communication. Integrating this capability within the chip package presents challenges in signal integrity and interference.
Photonics can help by enabling high-bandwidth connections inside and between chips. It also supports the use of new communication protocols and enables more efficient backhaul in network infrastructure.
The post-Moore era is defined by how well a chip can support the entire communication stack, not just how small it is.
Making AI Invisible and Instant
Artificial intelligence is becoming a key part of user experience, whether in voice assistants, facial recognition, predictive text, or background app management. Consumers expect these features to feel instantaneous and intuitive.
On-device AI accelerators are making this possible without draining the battery or requiring constant internet access. These accelerators are built using domain-specific architectures that do not require the smallest nodes to deliver excellent results. By focusing on targeted performance, designers are meeting expectations in ways that Moore’s Law scaling alone cannot achieve.
A broad-based strategy is now required to meet both technical and experiential goals. Erik Hosler shares, “Finally, the solution to keeping Moore’s Law going may entail incorporating photonics, MEMS, and other new technologies into the toolkit.” It recognizes that future progress is not linear. It is layered. The right combination of technologies, rather than continued scaling, will define successful consumer hardware in the future.
Rethinking Success at the Silicon Level
Foundries and designers alike are shifting focus. Instead of pouring all resources into the most advanced node, they are optimizing existing platforms with better materials, better thermal profiles, and more flexible packaging options.
Three-dimensional stacking, chiplet designs, and heterogeneous integration allow high-performance features to be layered onto power-efficient platforms. These approaches support the kind of responsiveness and adaptability consumers demand. They also enable better repairability, upgrade paths, and longer product life cycles; all things users care about more than transistor pitch.
Software and Hardware Are Now Equals
In the past, hardware advances led, and software adapted. Now, both are developing together. Software defines how hardware resources are used, what features are visible to the user, and how quickly new capabilities can be delivered through updates.
Consumer expectations are shaped by software but delivered through silicon. For this reason, hardware must be built to support abstraction, modularity, and continual enhancement. It is a profound shift from the days when better hardware meant only faster speeds.
Experience Is the New Benchmark
In the post-Moore’s Law era, success is not defined by smaller features. Satisfied users define it. Consumers do not care what lithographic tricks were used or how many nanometers separate transistors. They care about performance, consistency, intelligence, and ease of use.
Meeting these expectations requires a toolkit that includes photonics, MEMS, software integration, power management, and AI enablement. Shrinking will continue, but it will be one tool among many. The new standard is clear. Success depends on delivering a better experience, and that requires engineering strategies that extend well beyond traditional scaling.
